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Disambiguation of "Cotofana, Sorin Dan"

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A 3D stacked high performance scalable architecture for 3D Fourier Transform.

, , and . ICCD, page 498-499. IEEE Computer Society, (2012)

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Melina Danieli University of Stuttgart

Anne-Sophie Dantoing-Hinze University of Stuttgart

Andreas Daniel University of Stuttgart

Dr. Dan Corjescu University of Stuttgart

Dr. Dan Teodorovici University of Stuttgart

 

Other publications of authors with the same name

Context aware slope based transistor-level aging model., and . Microelectronics Reliability, 52 (9-10): 1792-1796 (2012)Ultra low power NEMFET based logic., , , , and . ISCAS, page 566-569. IEEE, (2013)Enabling vertical wormhole switching in 3D NoC-bus hybrid systems., , and . DATE, page 507-512. ACM, (2015)Compositional, efficient caches for a chip multi-processor., , , and . DATE, page 345-350. European Design and Automation Association, Leuven, Belgium, (2006)Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors., , , and . Trans. HiPEAC, (2007)Throughput optimization via cache partitioning for embedded multiprocessors., , , and . ICSAMOS, page 185-192. IEEE, (2006)Analog-to-digital converter based on single-electron tunneling transistors., , , and . IEEE Trans. VLSI Syst., 12 (11): 1209-1213 (2004)Bitstream compression techniques for Virtex 4 FPGAs., and . FPL, page 323-328. IEEE, (2008)An improved RNS reverse converter for the 22n+1-1, 2n, 2n-1 moduli set., , , and . ISCAS, page 2103-2106. IEEE, (2010)A unified addition structure for moduli set 2n-1, 2n, 2n+1 based on a novel RNS representation., , and . ICCD, page 247-252. IEEE Computer Society, (2010)