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Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources.

, , , and . DFT, page 368-376. IEEE Computer Society, (1999)

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On the multiple fault diagnosis of multistage interconnection networks: the lower bound and the CMOS fault model., , , and . ICPP, page 350-359. IEEE Computer Society, (1997)A coloring approach to the structural diagnosis of interconnects., and . ICCAD, page 676-680. IEEE Computer Society / ACM, (1996)On the Fault Coverage of Interconnect Diagnosis., , and . VTS, page 101-109. IEEE Computer Society, (1997)Using Virtual Links for Reliable Information Retrieval Across Point-to-Point Networks., , , and . FTCS, page 216-225. IEEE Computer Society, (1997)Reconfiguring one-time programmable FPGAs., , , , and . IEEE Micro, 19 (6): 53-63 (1999)Layout-driven detection of bridge faults in interconnects., , , and . DFT, page 105-113. IEEE Computer Society, (1996)Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources., , , and . DFT, page 368-376. IEEE Computer Society, (1999)Design Verification of FPGA Implementations., , , , and . IEEE Design & Test of Computers, 16 (2): 66-73 (1999)Structural diagnosis of interconnects by coloring., , and . ACM Trans. Design Autom. Electr. Syst., 3 (2): 249-271 (1998)Test generation and scheduling for layout-based detection of bridge faults in interconnects., , , and . IEEE Trans. VLSI Syst., 7 (1): 48-55 (1999)