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Disambiguation of "Zhou, Dian"

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Incremental Circuit Simulation Analysis for Design Modification and Verification.

, , and . ISCAS, page 2753-2756. IEEE, (2009)

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Dr. -Ing. Huan Zhou University of Stuttgart

Yangchao Zhou University of Stuttgart

Qian Zhou University of Stuttgart

 

Other publications of authors with the same name

A Two-pole Circuit Model for VLSI High-speed Interconnection., , , , and . ISCAS, page 2129-2132. IEEE, (1993)An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method., , , and . ISCAS (4), page 664-667. IEEE, (2003)Two-sided projection method in variational equation model order reduction of nonlinear circuits., , , , and . ISCAS (4), page 816-819. IEEE, (2004)Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires., , , and . ISCAS (1), page 113-116. IEEE, (2005)Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (8): 1385-1398 (2019)A context-aware computing mediated dynamic service composition and reconfiguration for ubiquitous environment., , , , , and . IOT, page 16-23. IEEE, (2012)Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography., , , , , and . ASP-DAC, page 652-657. IEEE, (2015)Efficient Memory Partitioning for Parallel Data Access via Data Reuse., , , and . FPGA, page 138-147. ACM, (2016)Minimization of chip size and power consumption of high-speed VLSI buffers., and . ISPD, page 186-191. ACM, (1997)An optimized mapping algorithm based on Simulated Annealing for regular NoC architecture., , , , , and . ASICON, page 389-392. IEEE, (2011)