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Disambiguation of "Tsui, F."

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A Two-pole Circuit Model for VLSI High-speed Interconnection.

, , , , and . ISCAS, page 2129-2132. IEEE, (1993)

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F. Dörr

F. Laufer

F. Rusitschka

F. Perni

F. D{\"o}rr

 

Other publications of authors with the same name

A Two-pole Circuit Model for VLSI High-speed Interconnection., , , , and . ISCAS, page 2129-2132. IEEE, (1993)A software development post-mortem summary., , and . Softw. Eng. J., 7 (4): 277-284 (1992)Neighbour State Transition Method for VLSI Optimization Problems., and . ICCD, page 476-479. IEEE Computer Society, (1993)The Cost and Speed Barriers in LSI/VLSI Testing : Can They Be Overcome By Testability Design ?. ITC, page 892-906. IEEE Computer Society, (1985)Die Abhängigkeit der Störabstände in Lesesignalen von dem Gesamtinformationsinhalt in einem Stromkoinzidenz-Ferritkernspeicher und ihre Verbesserung durch asymmetrische Ansteuerung (Teil 1).. Elektronische Rechenanlagen, 6 (2): 74-82 (1964)Neues Konstruktionsprinzip für einen wirtschaftlichen und betriebssicheren Halbfestwertspeicher., , and . Elektronische Rechenanlagen, 5 (1): 22-27 (1963)Der Magnetkernspeicher der PERM., and . Elektronische Rechenanlagen, 3 (6): 246-253 (1961)Die Abhängigkeit der Störabstände in Lesesignalen von dem Gesamtinformationsinhalt in einem Stromkoinzidenz-Ferritkernspeicher und ihre Verbesserung durch asymmetrische Ansteuerung (Teil 2).. Elektronische Rechenanlagen, 6 (3): 133-137 (1964)A Flexible and Inexpensive Method of Monitoring Program Execution in a Digital Computer.. IRE Trans. Electronic Computers, 10 (2): 253-259 (1961)Improving the Performance of the Sense-Amplifier Circuit Through Pre-Amplification Strobing and Noise-Matched Clipping.. IRE Trans. Electronic Computers, 11 (5): 677-683 (1962)