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Defect analysis in power mode control logic of low-power SRAMs.

L. Zordan, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, and N. Badereddine. European Test Symposium, page 1. IEEE Computer Society, (2012)

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Patrick Kopper University of Stuttgart

GALÆXI Validation: Taylor-Green VortexM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.

GALÆXI Validation: Taylor-Green VortexM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.GALÆXI Verification: Convergence TestsM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.GALÆXI Application: NASA Rotor 37M. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.

Patrick Gralka University of Stuttgart

Patrick Hippold University of Stuttgart

Patrick Maisenhölder University of Stuttgart

Patrick Lerge University of Stuttgart

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A Hybrid Power Estimation Technique to improve IP power models quality.A. Nocua, A. Virazel, A. Bosio, P. Girard, and C. Chevalier. VLSI-SoC, page 1-6. IEEE, (2016)An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization.K. Juneja, D. Patel, R. Immadi, B. Singh, S. Naudet, P. Agarwal, A. Virazel, and P. Girard. J. Electronic Testing, 32 (6): 721-733 (2016)Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity.P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, J. Figueras, S. Manich, J. Teixeira, and M. Santos. ISCAS (1), page 110-113. IEEE, (1999)Everything Else Being Equal: A Modal Logic for Ceteris Paribus Preferences.J. van Benthem, P. Girard, and O. Roy. J. Philosophical Logic, 38 (1): 83-125 (2009)Logical dynamics of belief change in the community.F. Liu, J. Seligman, and P. Girard. Synthese, 191 (11): 2403-2431 (2014)Vérification de cohérence entre modèles de tâches et de dialogue en conception centrée-utilisateur.S. Caffiau, P. Girard, L. Guittet, and X. Blanc. Ingénierie des Systèmes d'Information, 16 (5): 9-41 (2011)An effective hybrid fault-tolerant architecture for pipelined cores.I. Wali, A. Virazel, A. Bosio, L. Dilillo, and P. Girard. ETS, page 1-6. IEEE, (2015)Belief Revision and Dynamic Logic.P. Girard, and H. Rott. Johan van Benthem on Logic and Information Dynamics, Springer, (2014)Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint.Y. Bonhomme, P. Girard, L. Guiller, C. Landrault, and S. Pravossoudovitch. ITC, page 488-493. IEEE Computer Society, (2003)Power Driven Chaining of Flip-Flops in Scan Architectures.Y. Bonhomme, P. Girard, C. Landrault, and S. Pravossoudovitch. ITC, page 796-803. IEEE Computer Society, (2002)