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Disambiguation of "Sapatnekar, Sachin S."

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ALIGN: Open-Source Analog Layout Automation from the Ground Up.

, , , , , , , , and . DAC, page 77. ACM, (2019)

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S. Schumann

S. Seemann

S. Wartzack

Boettinger S

S. Toro

 

Other publications of authors with the same name

A scaled random walk solver for fast power grid analysis., and . DATE, page 38-43. IEEE, (2011)In Memoriam: Margarida F. Jacome., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (9): 1549-1550 (2007)Efficient inductance extraction using circuit-aware techniques., and . IEEE Trans. VLSI Syst., 10 (6): 746-761 (2002)Incorporating Hot-Carrier Injection Effects Into Timing Analysis for Large Circuits., and . IEEE Trans. VLSI Syst., 22 (12): 2738-2751 (2014)Variation-Aware Variable Latency Design., and . IEEE Trans. VLSI Syst., 22 (5): 1106-1117 (2014)CoMET: Composite-Input Magnetoelectric-based Logic Technology., , , , , and . CoRR, (2016)Editorial.. IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (1): 1 (2011)Capturing Post-Silicon Variations Using a Representative Critical Path., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (2): 211-222 (2010)Editorial.. IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (1): 1 (2010)Wire sizing as a convex optimization problem: exploring the area-delay tradeoff.. IEEE Trans. on CAD of Integrated Circuits and Systems, 15 (8): 1001-1011 (1996)