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Disambiguation of "Hu, Jiang"

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ALIGN: Open-Source Analog Layout Automation from the Ground Up.

, , , , , , , , and . DAC, page 77. ACM, (2019)

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Chenming Jiang University of Stuttgart

Huimin Hu University of Stuttgart

Yang Hu University of Stuttgart

Zhiming Hu University of Stuttgart

Nils Huber University of Stuttgart

 

Other publications of authors with the same name

A single layer zero skew clock routing in X architecture., , , , and . Science in China Series F: Information Sciences, 52 (8): 1466-1475 (2009)Boostable Repeater Design for Variation Resilience in VLSI Interconnects., and . IEEE Trans. VLSI Syst., 21 (9): 1619-1631 (2013)Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations., , and . IEEE Trans. VLSI Syst., 17 (3): 439-443 (2009)Low Power Gated Clock Tree Driven Placement., , , and . IEICE Transactions, 91-A (2): 595-603 (2008)Zero skew clock routing in X-architecture based on an improved greedy matching algorithm., , , , and . Integration, 41 (3): 426-438 (2008)Guest Editorial Special Section on the 2011 International Symposium on Physical Design., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (2): 165-166 (2012)Algorithms for Gate Sizing and Device Parameter Selection for High-Performance Designs., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (10): 1558-1571 (2012)STORM: A Simple Traffic-Optimized Router Microarchitecture for Networks-on-Chip., , , and . NOCS, page 176-177. IEEE, (2014)Integrated placement and skew optimization for rotary clocking., , , and . DATE, page 756-761. European Design and Automation Association, Leuven, Belgium, (2006)A Simple Yet Effective Merging Scheme for Prescribed-Skew Clock Routing., and . ICCD, page 282-. IEEE Computer Society, (2003)