%0 Journal Article %1 journals/tvlsi/LiuZH09 %A Liu, Yang %A Zhang, Tong %A Hu, Jiang %D 2009 %J IEEE Trans. VLSI Syst. %K dblp %N 3 %P 439-443 %T Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi17.html#LiuZH09 %V 17

@article{journals/tvlsi/LiuZH09, added-at = {2014-09-09T00:00:00.000+0200}, author = {Liu, Yang and Zhang, Tong and Hu, Jiang}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2126806da50047c3cdd71e4d3b14f0edc/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2008.2004545}, interhash = {2c5d516723b34728fd567eda67082531}, intrahash = {126806da50047c3cdd71e4d3b14f0edc}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 3, pages = {439-443}, timestamp = {2016-02-02T02:13:45.000+0100}, title = {Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi17.html#LiuZH09}, volume = 17, year = 2009 }