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An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and $V_MIN$ Optimization.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , and . J. Solid-State Circuits, 54 (1): 144-157 (2019)

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8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation., , , , , , , , , and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)A staircase conductance modulation scheme for input-current-shaping in switched-capacitor DC-DC converters., , and . ISCAS, page 1664-1667. IEEE, (2014)A Comprehensive Analysis of Hybrid Phase-Modulated Converter With Current-Doubler Rectifier and Comparison With Its Center-Tapped Counterpart., , , and . IEEE Trans. Industrial Electronics, 53 (6): 1870-1880 (2006)Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS., , , , , and . CICC, page 1-4. IEEE, (2014)A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters., and . ISCAS, page 825-828. IEEE, (2011)An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and $V_MIN$ Optimization., , , , , , , , , and 19 other author(s). J. Solid-State Circuits, 54 (1): 144-157 (2019)20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 336-337. IEEE, (2017)A 0.45-1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS., , , , , , and . J. Solid-State Circuits, 49 (4): 917-927 (2014)A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS., , , , , , , , , and 2 other author(s). J. Solid-State Circuits, 53 (1): 8-19 (2018)Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS., , , , , and . J. Solid-State Circuits, 50 (8): 1809-1819 (2015)