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Disambiguation of "Matthew, George E."

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A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS.

, , , , , , , , , , , and . J. Solid-State Circuits, 53 (1): 8-19 (2018)

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Ph. D. Matthew Millard University of Stuttgart

Die Reflexaktivität der Halsmuskulatur bei seitlichen Fahrmanövern im Fahrsimulator, , , , , , and . dvs-Biomechanik 2023 Tagungsband : Beiträge zur Tagung der dvs-Sektion Biomechanik 2023 an der Otto-von-Guericke-Universität Magdeburg, page 180-182. Stuttgart, Steinbeis-Edition, (2023)

E. Garrelts

E. Zafeiriou

Matthew Joliffe University of Stuttgart

P. E. Bl\"ochl

 

Other publications of authors with the same name

A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS., , , , , , , , , and 2 other author(s). J. Solid-State Circuits, 53 (1): 8-19 (2018)A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS., , , , , , , and . J. Solid-State Circuits, 53 (4): 1038-1048 (2018)A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS., , , , , , , , , and . CICC, page 1-4. IEEE, (2015)A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS., , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and $V_MIN$ Optimization., , , , , , , , , and 19 other author(s). J. Solid-State Circuits, 54 (1): 144-157 (2019)20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 336-337. IEEE, (2017)