Author of the publication

Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS.

, , , , , and . J. Solid-State Circuits, 50 (8): 1809-1819 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS., , , , , and . CICC, page 1-4. IEEE, (2014)An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and $V_MIN$ Optimization., , , , , , , , , and 19 other author(s). J. Solid-State Circuits, 54 (1): 144-157 (2019)20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 336-337. IEEE, (2017)A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS., , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS., , , , , , , , , and . CICC, page 1-4. IEEE, (2015)Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS., , , , , and . J. Solid-State Circuits, 50 (8): 1809-1819 (2015)Universal Current-Mode Control Schemes to Charge Li-Ion Batteries Under DC/PV Source., , , , , and . IEEE Trans. on Circuits and Systems, 63-I (9): 1531-1542 (2016)A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS., , , , , , , , , and 2 other author(s). J. Solid-State Circuits, 53 (1): 8-19 (2018)