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Disambiguation of "Bellido, Manuel J."

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Network Time Synchronization: A Full Hardware Approach.

, , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 225-234. Springer, (2012)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

J. K\"astner

J. Schwarz

Manuel Weiss University of Stuttgart

Software-Defined Control Cabinet : Reprogramming Instead of Replacing, , , and . Production at the Leading Edge of Technology : Proceedings of the 13th Congress of the German Academic Association for Production Technology (WGP), page 438-447. Cham, Springer, (2024)

J. K\"astner

J Walter

 

Other publications of authors with the same name

Gate-level simulation of CMOS circuits using the IDDM model., , , , and . ISCAS (5), page 483-486. IEEE, (2001)Multimedia System for Instruction and Learning Electronics., , , and . CALISCE, volume 1108 of Lecture Notes in Computer Science, page 442-444. Springer, (1996)Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells., , , , , , and . J. Low Power Electronics, 7 (3): 444-452 (2011)Degradation Delay Model Extension to CMOS Gates., , , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 149-158. Springer, (2000)Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 501-510. Springer, (2003)Modeling of real bistables in VHDL., , , , and . EURO-DAC, page 460-465. IEEE Computer Society, (1993)Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates., , , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 389-398. Springer, (2008)Internode: Internal Node Logic Computational Model., , , , , and . Annual Simulation Symposium, page 241-248. IEEE Computer Society, (2003)Signal Sampling Based Transition Modeling for Digital Gates Characterization., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 829-837. Springer, (2004)Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits., , , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 316-326. Springer, (2000)