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Disambiguation of "Ambrogio, Stefano"

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Energy-efficient continual learning in hybrid supervised-unsupervised neural networks with PCM synapses.

, , , , , and . VLSI Circuits, page 1-2. IEEE, (2019)

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Stefano Scarso University of Stuttgart

 

Other publications of authors with the same name

True Random Number Generation by Variability of Resistive Switching in Oxide-Based Devices., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (2): 214-221 (2015)Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning., , , , and . ISCAS, page 1386-1389. IEEE, (2016)AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed., , , , , , , , , and . IBM Journal of Research and Development, 63 (6): 8:1-8:14 (2019)Energy-efficient continual learning in hybrid supervised-unsupervised neural networks with PCM synapses., , , , , and . VLSI Circuits, page 1-2. IEEE, (2019)Analytical modelling and leakage optimization in complementary resistive switch (CRS) crossbar arrays., , , and . ESSDERC, page 242-245. IEEE, (2014)Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration., , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (2): 367-376 (2019)Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique., , , , , , , , , and 1 other author(s). ICRC, page 1-8. IEEE, (2017)Data retention statistics and modelling in HfO2 resistive switching memories., , , , , , and . IRPS, page 7. IEEE, (2015)A 4-Transistors/1-Resistor Hybrid Synapse Based on Resistive Switching Memory (RRAM) Capable of Spike-Rate-Dependent Plasticity (SRDP)., , , , , , and . IEEE Trans. VLSI Syst., 26 (12): 2806-2815 (2018)Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays., , , , , , , , and . ISCAS, page 1-4. IEEE, (2017)