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Pulse-Width Modulation based Dot-Product Engine for Neuromorphic Computing System using Memristor Crossbar Array.

H. Jiang, K. Yamada, Z. Ren, T. Kwok, F. Luo, Q. Yang, X. Zhang, J. Yang, Q. Xia, Y. Chen, H. Li, Q. Wu, and M. Barnell. ISCAS, page 1-4. IEEE, (2018)

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Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Jingshan Chen University of Stuttgart

Other publications of authors with the same name

Loadsa: A yield-driven top-down design method for STT-RAM array.W. Wen, Y. Zhang, L. Zhang, and Y. Chen. ASP-DAC, page 291-296. IEEE, (2013)Energy efficient neural networks for big data analytics.Y. Wang, B. Li, R. Luo, Y. Chen, N. Xu, and H. Yang. DATE, page 1-2. European Design and Automation Association, (2014)Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer.J. Guo, J. Yang, Y. Zhang, and Y. Chen. DATE, page 859-864. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Cache coherence enabled adaptive refresh for volatile STT-RAM.J. Li, L. Shi, Q. Li, C. Xue, Y. Chen, and Y. Xu. DATE, page 1247-1250. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system.D. Wang, J. Guo, K. Bu, and Y. Chen. ICNC, page 259-263. IEEE, (2014)Neuromorphic computing: A SoC scaling path for the next decades.Y. Chen, and Q. Wu. SoCC, page 290-291. IEEE, (2012)Low-Power Design of Emerging Memory Technologies.Y. Chen, H. Li, Y. Xie, and D. Niu. Handbook of Energy-Aware and Green Computing, Chapman and Hall/CRC, (2012)FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.J. Guo, W. Wen, J. Hu, D. Wang, H. Li, and Y. Chen. IEEE Trans. on CAD of Integrated Circuits and Systems, 36 (7): 1167-1180 (2017)TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations.Z. Liu, M. Mao, T. Liu, X. Wang, W. Wen, Y. Chen, H. Li, D. Wang, Y. Pei, and N. Ge. IEEE Trans. on CAD of Integrated Circuits and Systems, 37 (10): 1985-1998 (2018)Learning Intrinsic Sparse Structures within Long Short-term Memory.W. Wen, Y. He, S. Rajbhandari, W. Wang, F. Liu, B. Hu, Y. Chen, and H. Li. CoRR, (2017)

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Disambiguation of "Chen, Yiran"

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Pulse-Width Modulation based Dot-Product Engine for Neuromorphic Computing System using Memristor Crossbar Array.

Please choose a person to relate this publication to

Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Jingshan Chen University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Chen, Yiran"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Pulse-Width Modulation based Dot-Product Engine for Neuromorphic Computing System using Memristor Crossbar Array.

Please choose a person to relate this publication to

Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Jingshan Chen University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Pulse-Width Modulation based Dot-Product Engine for Neuromorphic Computing System using Memristor Crossbar Array.