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Disambiguation of "Lee, Kuen-Jong"

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An Efficient On-Chip Test Generation Scheme Based on Programmable and Multiple Twisted-Ring Counters.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (8): 1254-1264 (2013)

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Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

Ph. D. Benjamin Lee University of Stuttgart

Yoonhee Lee University of Stuttgart

 

Other publications of authors with the same name

Improve transition fault diagnosability via observation point insertion., , and . VLSI-DAT, page 1-4. IEEE, (2015)An Efficient BIST Method for Small Buffers., , , and . VTS, page 246-251. IEEE Computer Society, (1999)An Efficient Diagnosis Pattern Generation Procedure to Distinguish Stuck-at Faults and Bridging Faults., and . ATS, page 306-311. IEEE Computer Society, (2014)A Complete Logic BIST Technology with No Storage Requirement., and . Asian Test Symposium, page 129-134. IEEE Computer Society, (2010)Transaction Level Modeling and Design Space Exploration for SOC Test Architectures., , , and . Asian Test Symposium, page 200-205. IEEE Computer Society, (2009)Output-bit selection with X-avoidance using multiple counters for test-response compaction., , , and . ETS, page 1-6. IEEE, (2014)A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling., , , , , , , , , and 3 other author(s). ASP-DAC, page 17-18. IEEE, (2016)Programmable System-on-Chip for Silicon Prototyping., , , , , , , and . IEEE Trans. Industrial Electronics, 58 (3): 830-838 (2011)Turbo1500: Core-Based Design for Test and Diagnosis., , , , , , , , , and 5 other author(s). IEEE Design & Test of Computers, 26 (1): 26-35 (2009)An embedded processor based SOC test platform., , and . ISCAS (3), page 2983-2986. IEEE, (2005)