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Disambiguation of "Straube, Bernd"

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Automatic Equivalence Check of Circuit Descriptions at Clocked Algorithmic and Register Transfer Level.

, and . DATE, page 759. IEEE Computer Society / ACM, (2000)

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Bernd Bertsche

Dr. rer. nat. Bernd Schulz University of Stuttgart

Bernd Peters University of Stuttgart

apl. Prof. Dr. Bernd Flemisch University of Stuttgart

Bernd Bertsche

 

Other publications of authors with the same name

Fault Tolerant Mechatronics., , and . IOLTS, page 214-218. IEEE Computer Society, (2004)Kontrollfluss-Verifikation von Algorithmen mittels Modellprüfung., , , , and . MBMV, page 114-123. HNI-Verlagsschriften, (1998)Induction based Equivalence Check at Register Transfer Level., and . MBMV, page 37-44. VDE, (2000)Formal Verification of the Quasi-Static Behavior of Mixed-Signal Circuits by Property Checking., , and . Electron. Notes Theor. Comput. Sci., 153 (3): 23-35 (2006)A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction., , , , , and . DFT, page 50-58. IEEE Computer Society, (2007)DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems)., , , , and . it - Information Technology, 48 (5): 304- (2006)Defect-Oriented Experiments in Fault Modelling and Fault Simulation of Microsystem Components., , and . ED&TC, page 522-527. IEEE Computer Society, (1996)Formale Verifikation auf höheren Entwurfsebenen mittels symbolischer Traversierung unendlicher Automaten., and . MBMV, page 47-56. VDE, (2000)Formal Verification for Microprocessors with Extendable Instruction Set., , , and . ASAP, page 47-55. IEEE Computer Society, (2000)Compositional verification of material handling systems., , , , , and . ETFA, page 1-8. IEEE, (2012)