Author of the publication

DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems).

, , , , and . it - Information Technology, 48 (5): 304- (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Synthesizing Fast, Online-Testable Control Units., , and . IEEE Design & Test of Computers, 15 (4): 36-41 (1998)Error Detecting Refreshment for Embedded DRAMs., , , , and . VTS, page 384-390. IEEE Computer Society, (1999)The pseudoexhaustive test of sequential circuits., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 11 (1): 26-33 (1992)Design for Small Delay Test - A Simulation Study., and . Microelectronics Reliability, (2018)Foreword., , , , , and . ETS, page 1-2. IEEE, (2017)A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters., , and . J. Electronic Testing, 17 (3-4): 341-349 (2001)Variation-Aware Fault Modeling., , , , , , and . Asian Test Symposium, page 87-93. IEEE Computer Society, (2010)Low power embedded DRAMs with high quality error correcting capabilities., and . European Test Symposium, page 148-153. IEEE Computer Society, (2005)Built-in self-diagnosis exploiting strong diagnostic windows in mixed-mode test., , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)Data Compression for Multiple Scan Chains Using Dictionaries with Corrections., , and . ITC, page 926-935. IEEE Computer Society, (2004)