Author of the publication

Provably optimal test cube generation using quantified boolean formula solving.

, , , , and . ASP-DAC, page 533-539. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Parallel SAT Solving in Bounded Model Checking., , , , and . J. Log. Comput., 21 (1): 5-21 (2011)SAT-ATPG using preferences for improved detection of complex defect mechanisms., , , , and . VTS, page 170-175. IEEE Computer Society, (2012)Automatic Test Pattern Generation for Interconnect Open Defects., , , , , and . VTS, page 181-186. IEEE Computer Society, (2008)On the (non-)resetability of synchronous sequential circuits., , and . VTS, page 240-245. IEEE Computer Society, (1996)On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms., , , and . VTS, page 426-433. IEEE Computer Society, (1997)On the automatic generation of SBST test programs for in-field test., , , , and . DATE, page 1186-1191. ACM, (2015)Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST., , and . DATE, page 11184-11185. IEEE Computer Society, (2003)On the representational power of bit-level and word-level decision diagrams., , and . ASP-DAC, page 461-467. IEEE, (1997)Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects., , , , and . ATS, page 131-136. IEEE Computer Society, (2014)QmiraXT - A Multithreaded QBF Solver., , and . MBMV, page 7-16. Universitätsbibliothek Berlin, Germany, (2009)