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TCAD EIC Message: February 2019.

P. Brisk, S. Chakraborty, C. Coelho, A. Gamatié, S. Ghosh, and X. Jiao. IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (2): 197-198 (2019)

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Philip Russ University of Stuttgart

Philip Dörge University of Stuttgart

Univ. -Prof. Dr. -Ing. Philip Leistner University of Stuttgart

Philip Reitinger University of Stuttgart

Philip Leistner

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Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions.T. Kluter, P. Brisk, E. Charbon, and P. Ienne. IEEE Trans. VLSI Syst., 22 (1): 62-75 (2014)Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits.A. Verma, P. Brisk, and P. Ienne. IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (10): 1761-1774 (2008)Counting stream registers: An efficient and effective snoop filter architecture.A. Ranganathan, A. Bayrak, T. Kluter, P. Brisk, E. Charbon, and P. Ienne. ICSAMOS, page 120-127. IEEE, (2012)Hybrid LZA: a near optimal implementation of the leading zero anticipator.A. Verma, A. Verma, P. Brisk, and P. Ienne. ASP-DAC, page 203-209. IEEE, (2009)Exploiting fast carry-chains of FPGAs for designing compressor trees.H. Parandeh-Afshar, P. Brisk, and P. Ienne. FPL, page 242-249. IEEE, (2009)Automatic Application of Power Analysis Countermeasures.A. Bayrak, F. Regazzoni, D. Novo, P. Brisk, F. Standaert, and P. Ienne. IEEE Trans. Computers, 64 (2): 329-341 (2015)A Low-Cost Field-Programmable Pin-Constrained Digital Microfluidic Biochip.D. Grissom, J. McDaniel, and P. Brisk. IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (11): 1657-1670 (2014)Path scheduling on digital microfluidic biochips.D. Grissom, and P. Brisk. DAC, page 26-35. ACM, (2012)Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage.T. Kluter, S. Burri, P. Brisk, E. Charbon, and P. Ienne. TACO, 11 (2): 15:1-15:26 (2014)Reducing the cost of floating-point mantissa alignment and normalization in FPGAs.Y. Moctar, N. George, H. Parandeh-Afshar, P. Ienne, G. Lemieux, and P. Brisk. FPGA, page 255-264. ACM, (2012)