Author of the publication

Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits.

, , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (10): 1761-1774 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (10): 1761-1774 (2008)Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions., , , and . IEEE Trans. VLSI Syst., 22 (1): 62-75 (2014)Counting stream registers: An efficient and effective snoop filter architecture., , , , , and . ICSAMOS, page 120-127. IEEE, (2012)Hybrid LZA: a near optimal implementation of the leading zero anticipator., , , and . ASP-DAC, page 203-209. IEEE, (2009)Exploiting fast carry-chains of FPGAs for designing compressor trees., , and . FPL, page 242-249. IEEE, (2009)A Low-Cost Field-Programmable Pin-Constrained Digital Microfluidic Biochip., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (11): 1657-1670 (2014)Path scheduling on digital microfluidic biochips., and . DAC, page 26-35. ACM, (2012)Automatic Application of Power Analysis Countermeasures., , , , , and . IEEE Trans. Computers, 64 (2): 329-341 (2015)Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage., , , , and . TACO, 11 (2): 15:1-15:26 (2014)Reducing the cost of floating-point mantissa alignment and normalization in FPGAs., , , , , and . FPGA, page 255-264. ACM, (2012)