PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ren, Pengju"

Author of the publication

copydeleteadd this publication to your clipboard
Hardware implementation of KLMS algorithm using FPGA.

, , , , and . IJCNN, page 2276-2281. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Weibo Ren University of Stuttgart

Anja Rentz University of Stuttgart

Dr. -Ing. Jörg Renner University of Stuttgart

Sylvia Rendsburg University of Stuttgart

Ulrich Rentschler University of Stuttgart

 

Other publications of authors with the same name

A Deadlock-Free and Connectivity-Guaranteed Methodology for Achieving Fault-Tolerance in On-Chip Networks., , , , and . IEEE Trans. Computers, 65 (2): 353-366 (2016)Depth map generation from geometry and motion., , , and . ICDIP, volume 8878 of SPIE Proceedings, page 88780G. SPIE, (2013)Scalable, accurate multicore simulation in the 1000-core era., , , , , , and . ISPASS, page 175-185. IEEE Computer Society, (2011)HORNET: A Cycle-Level Multicore Simulator., , , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (6): 890-903 (2012)Activations Quantization for Compact Neural Networks., , , , , and . DSL, page 1-5. IEEE, (2018)Reconstruction of Visual Image From Functional Magnetic Resonance Imaging Using Spiking Neuron Model., , , , , and . IEEE Trans. Cognitive and Developmental Systems, 10 (3): 624-636 (2018)FASHION: Fault-Aware Self-Healing Intelligent On-chip Network., , , , , , , and . CoRR, (2017)A 4K×2K@60fps Multi-format Multi-function Display Processor for High Perceptual Quality., , , , , , , , , and 3 other author(s). APCCAS, page 427-430. IEEE, (2018)Architecting high-performance energy-efficient soft error resilient cache under 3D integration technology., , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 35 (4): 371-381 (2011)A reconfigurable parallel acceleration platform for evaluation of permutation entropy., , , , and . EMBC, page 5735-5738. IEEE, (2014)