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Disambiguation of "Suresh, Vikram B."

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A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS.

, , , , , , , , , and . IEEE J. Solid State Circuits, 52 (4): 940-949 (2017)

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B. Schlecht

Max B. Schäfer

Univ. -Prof. Dr. -Ing. Lucio Blandini University of Stuttgart

Modularisation Strategies for Individualised Precast Construction - Conceptual Fundamentals and Research Directions, , , , , , , , , and 10 other author(s). Designs, (2023)

Andreas Baumann University of Stuttgart

Experimental collisions of varying roughness wetted particles in the pendular regime compared to numerical simulations, , , and . Phys. Rev. Fluids, 9 (5): 054302-1 -- 054302-26 (May 2024)

Univ. -Prof. Dr. -Ing. Steffen Becker University of Stuttgart

Pruning Modes for Deployment Models: From Manual Modeling to Automated Removal of Elements and Their Implications, , and . (2024)
 

Other publications of authors with the same name

On lithography aware metal-fill insertion., , and . ISQED, page 200-207. IEEE, (2012)Implementing hardware Trojans: Experiences from a hardware Trojan challenge., , , , , and . ICCD, page 301-304. IEEE Computer Society, (2011)REFLEX: Reconfigurable logic for entropy extraction., and . SoCC, page 341-346. IEEE, (2014)An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (4): 1074-1085 (2019)A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 56 (4): 1141-1151 (2021)Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS., , , , , , , , , and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)On-chip lightweight implementation of reduced NIST randomness test suite., , and . HOST, page 93-98. IEEE Computer Society, (2013)Managing test coverage uncertainty due to thermal noise in nano-CMOS: A case-study on an SRAM array., and . ICCD, page 201-206. IEEE Computer Society, (2013)Entropy Extraction in Metastability-based TRNG., and . HOST, page 135-140. IEEE Computer Society, (2010)340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 50 (4): 1048-1058 (2015)