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Enhancing Regression Models for Complex Systems Using Evolutionary Techniques for Feature Engineering.

P. Arroba, J. Risco-Martín, M. Zapater, J. Moya, and J. Ayala. J. Grid Comput., 13 (3): 409-423 (2015)

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Prof. Jose Luis Moro University of Stuttgart

Jithin Jose University of Stuttgart

Basil Jose University of Stuttgart

Luis Orozco University of Stuttgart

Luis Mandl University of Stuttgart

Other publications of authors with the same name

A hardware mechanism to reduce the energy consumption of the register file of in-order architectures.J. Ayala, M. López-Vallejo, C. López-Barrio, and A. Veidenbaum. IJES, 3 (4): 285-293 (2008)Thermal analysis and modeling of embedded processors.J. Ayala, C. Méndez, and M. López-Vallejo. Computers & Electrical Engineering, 36 (1): 142-154 (2010)Leakage Energy Reduction in Banked Content Addressable Memories.P. Echeverría, J. Ayala, and M. López-Vallejo. ICECS, page 1196-1199. IEEE, (2006)Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures.D. Atienza, P. Raghavan, J. Ayala, G. Micheli, F. Catthoor, D. Verkest, and M. López-Vallejo. Integration, 41 (1): 38-48 (2008)Combined Dynamic-Static Approach for Thermal-Awareness in Heterogeneous Data Centers.M. Zapater, J. Risco-Martín, Z. Bankovic, J. Ayala, and J. Moya. IWIA, page 75-82. IEEE, (2010)Leakage and temperature aware server control for improving energy efficiency in data centers.M. Zapater, J. Ayala, J. Moya, K. Vaidyanathan, K. Gross, and A. Coskun. DATE, page 266-269. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Special issue on energy efficient multi-core and many-core systems, Part II.A. Rahmani, P. Liljeberg, J. Ayala, H. Tenhunen, and A. Veidenbaum. J. Parallel Distrib. Comput., (2017)A novel energy-driven computing paradigm for e-health scenarios.M. Zapater, P. Arroba, J. Ayala, J. Moya, and K. Olcoz. Future Generation Comp. Syst., (2014)Energy Efficiency Using Loop Buffer based Instruction Memory Organizations.A. Artés, F. Duarte, M. Ashouei, J. Huisken, J. Ayala, D. Atienza, and F. Catthoor. IWIA, page 59-67. IEEE, (2010)Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications.A. Artés, J. Ayala, A. Sathanur, J. Huisken, and F. Catthoor. VLSI-SoC, page 136-141. IEEE, (2011)

PUMA

Disambiguation of "Ayala, José Luis"

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Enhancing Regression Models for Complex Systems Using Evolutionary Techniques for Feature Engineering.

Please choose a person to relate this publication to

Prof. Jose Luis Moro University of Stuttgart

Jithin Jose University of Stuttgart

Basil Jose University of Stuttgart

Luis Orozco University of Stuttgart

Luis Mandl University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Ayala, José Luis"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Enhancing Regression Models for Complex Systems Using Evolutionary Techniques for Feature Engineering.

Please choose a person to relate this publication to

Prof. Jose Luis Moro University of Stuttgart

Jithin Jose University of Stuttgart

Basil Jose University of Stuttgart

Luis Orozco University of Stuttgart

Luis Mandl University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Enhancing Regression Models for Complex Systems Using Evolutionary Techniques for Feature Engineering.