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Disambiguation of "Echeverría, Pedro"

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Leakage Energy Reduction in Banked Content Addressable Memories.

, , and . ICECS, page 1196-1199. IEEE, (2006)

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Dr. Elisete Pedrollo University of Stuttgart

Max Alfred Bartholet Echeverria University of Stuttgart

Pedro Miguel de Campos Resende University of Stuttgart

 

Other publications of authors with the same name

High Performance FPGA-oriented Mersenne Twister Uniform Random Number Generator., and . Signal Processing Systems, 71 (2): 105-109 (2013)Designing Highly Parameterized Hardware using xHdl., , , and . FDL, page 78-83. IEEE, (2008)Variance reduction techniques for Monte Carlo simulations. A parameterizable FPGA approach., , and . ICECS, page 1296-1299. IEEE, (2008)Customizing floating-point units for FPGAs: Area-performance-standard trade-offs., and . Microprocessors and Microsystems - Embedded Hardware Design, 35 (6): 535-546 (2011)Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs., , , and . ICECS, page 423-426. IEEE, (2009)Experimental methodology for power characterization of FPGAs., , , and . ICECS, page 582-585. IEEE, (2008)An FPGA run-time parameterisable Log-Normal Random Number Generator., , , and . ARC, volume 4943 of Lecture Notes in Computer Science, page 219-230. Springer, (2008)Floating-Point Exponentiation Units for Reconfigurable Computing., , , and . TRETS, 6 (1): 4:1-4:15 (2013)Leakage Energy Reduction in Banked Content Addressable Memories., , and . ICECS, page 1196-1199. IEEE, (2006)Power Considerations in Banked CAMs: A Leakage Reduction Approach., , and . VLSI Design, (2008)