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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.

T. Xu, V. Leppänen, P. Liljeberg, J. Plosila, and H. Tenhunen. PPAM (1), volume 8384 of Lecture Notes in Computer Science, page 513-522. Springer, (2013)

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Exploring a Low-Cost and Power-Efficient Hybridization Technique for 3D NoC-Bus Hybrid Architecture Using LastZ-Based Routing Algorithms.A. Rahmani, P. Liljeberg, J. Plosila, and H. Tenhunen. J. Low Power Electronics, 8 (4): 403-414 (2012)Parallelized Online Regularized Least-Squares for Adaptive Embedded Systems.T. Pahikkala, A. Airola, T. Xu, P. Liljeberg, H. Tenhunen, and T. Salakoski. IJERTCS, 3 (2): 73-91 (2012)Exploration of Temperature-Aware Placement Approaches in 2D and 3D Stacked Systems.K. Vaddina, P. Liljeberg, and J. Plosila. IJARAS, 4 (3): 61-81 (2013)Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects.T. Lehtonen, D. Wolpert, P. Liljeberg, J. Plosila, and P. Ampadu. IEEE Trans. VLSI Syst., 18 (4): 527-540 (2010)High-Performance and Fault-Tolerant 3D NoC-Bus Hybrid Architecture Using ARB-NET-Based Adaptive Monitoring Platform.A. Rahmani, K. Vaddina, K. Latif, P. Liljeberg, J. Plosila, and H. Tenhunen. IEEE Trans. Computers, 63 (3): 734-747 (2014)Special issue on network-based many-core embedded systems.M. Daneshtalab, P. Liljeberg, M. Modarressi, and L. Indrusiak. Journal of Systems Architecture - Embedded Systems Design, 59 (9): 691-692 (2013)Adaptive load balancing in learning-based approaches for many-core embedded systems.F. Farahnakian, M. Ebrahimi, M. Daneshtalab, P. Liljeberg, and J. Plosila. The Journal of Supercomputing, 68 (3): 1214-1234 (2014)Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures.K. Latif, A. Rahmani, K. Vaddina, T. Seceleanu, P. Liljeberg, and H. Tenhunen. DSD, page 626-633. IEEE Computer Society, (2011)Pervasive health monitoring based on Internet of Things: Two case studies.A. Anurag, S. Moosavi, A. Rahmani, T. Westerlund, G. Yang, P. Liljeberg, and H. Tenhunen. MobiHealth, page 275-278. ICST/IEEE, (2014)Operating System Processor Scheduler Design for Future Chip Multiprocessor.T. Xu, A. Yin, P. Liljeberg, and H. Tenhunen. ARCS Workshops, page 69-76. VDE Verlag, (2010)

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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.

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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.