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A Fully Pipelined and Dynamically Composable Architecture of CGRA.

, , , , and . FCCM, page 9-16. IEEE Computer Society, (2014)

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A New Computer Architecture Using a New Program Driving Method., , , , , , , , and . ACIS-ICIS, page 345-349. IEEE Computer Society, (2006)A memory schedule policy oriented to stream architecture., and . RTCSA, page 1-5. IEEE Computer Society, (2014)A Fully Pipelined and Dynamically Composable Architecture of CGRA., , , , and . FCCM, page 9-16. IEEE Computer Society, (2014)Efficient translation validation of high-level synthesis., , , and . ISQED, page 516-523. IEEE, (2013)A DRAM Precharge Policy Based on Address Analysis., and . DSD, page 244-248. IEEE Computer Society, (2007)Language-Extension-Based Vectorizing Compiling Scheme on SDR-DSP., , and . NCCET, volume 666 of Communications in Computer and Information Science, page 15-23. Springer, (2016)A New Processor Architecture with a New Program Driving Method., , , , , , , , and . CDES, page 203-206. CSREA Press, (2006)