Author of the publication

A Fully Pipelined and Dynamically Composable Architecture of CGRA.

, , , , and . FCCM, page 9-16. IEEE Computer Society, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Fully Pipelined and Dynamically Composable Architecture of CGRA., , , , and . FCCM, page 9-16. IEEE Computer Society, (2014)On the cycle decomposition of the WG-NLFSR., , , and . IACR Cryptology ePrint Archive, (2014)Aperiodic intermittent pinning control for exponential synchronization of memristive neural networks with time-varying delays., , , and . Neurocomputing, (2019)SODA: stencil with optimized dataflow architecture., , , and . ICCAD, page 116. ACM, (2018)Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks., , , , and . ICCAD, page 12. ACM, (2016)Bandwidth Optimization Through On-Chip Memory Restructuring for HLS., , , and . DAC, page 43:1-43:6. ACM, (2017)Best-Effort FPGA Programming: A Few Steps Can Go a Long Way., , , , , , and . CoRR, (2018)LSTM Based on the Classification of Emotion about User Evaluation on Shopping Site., , , and . IIKI, page 52-53. IEEE Computer Society, (2016)ST-Accel: A High-Level Programming Platform for Streaming Applications on FPGA., , , , and . FCCM, page 9-16. IEEE Computer Society, (2018)Lag synchronization for neural networks with mixed delays via adaptive intermittent control., and . IECON, page 5849-5854. IEEE, (2017)