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Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks.

C. Sakr, N. Wang, C. Chen, J. Choi, A. Agrawal, N. Shanbhag, and K. Gopalakrishnan. ICLR (Poster), OpenReview.net, (2019)

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PACT: Parameterized Clipping Activation for Quantized Neural Networks.J. Choi, Z. Wang, S. Venkataramani, P. Chuang, V. Srinivasan, and K. Gopalakrishnan. CoRR, (2018)Exploiting approximate computing for deep learning acceleration.C. Chen, J. Choi, K. Gopalakrishnan, V. Srinivasan, and S. Venkataramani. DATE, page 821-826. IEEE, (2018)A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.B. Fleischer, S. Shukla, M. Ziegler, J. Silberman, J. Oh, V. Srinivasan, J. Choi, S. Mueller, A. Agrawal, T. Babinsky and 21 other author(s). VLSI Circuits, page 35-36. IEEE, (2018)A Compiler for Deep Neural Network Accelerators to Generate Optimized Code for a Wide Range of Data Parameters from a Hand-crafted Computation Kernel.E. Ogawa, K. Ishizaki, H. Inoue, S. Venkataramani, J. Choi, W. Wang, V. Srinivasan, M. Ohara, and K. Gopalakrishnan. COOL CHIPS, page 1-3. IEEE, (2019)DeepTools: Compiler and Execution Runtime Extensions for RaPiD AI Accelerator.S. Venkataramani, J. Choi, V. Srinivasan, W. Wang, J. Zhang, M. Schaal, M. Serrano, K. Ishizaki, H. Inoue, E. Ogawa and 3 other author(s). IEEE Micro, 39 (5): 102-111 (2019)A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.S. Lee, A. Agrawal, J. Silberman, M. Ziegler, M. Kang, S. Venkataramani, N. Cao, B. Fleischer, M. Guillorn, M. Cohen and 34 other author(s). IEEE J. Solid State Circuits, 57 (1): 182-197 (2022)Nanoscale electronic synapses using phase change devices.B. Jackson, B. Rajendran, G. Corrado, M. Breitwisch, G. Burr, R. Cheek, K. Gopalakrishnan, S. Raoux, C. Rettner, A. Padilla and 5 other author(s). JETC, 9 (2): 12:1-12:20 (2013)Accelerator Design for Deep Learning Training: Extended Abstract: Invited.A. Agrawal, C. Chen, J. Choi, K. Gopalakrishnan, J. Oh, S. Shukla, V. Srinivasan, S. Venkataramani, and W. Zhang. DAC, page 57:1-57:2. ACM, (2017)Deep Learning with Limited Numerical Precision.S. Gupta, A. Agrawal, K. Gopalakrishnan, and P. Narayanan. ICML, volume 37 of JMLR Workshop and Conference Proceedings, page 1737-1746. JMLR.org, (2015)AdaComp : Adaptive Residual Gradient Compression for Data-Parallel Distributed Training.C. Chen, J. Choi, D. Brand, A. Agrawal, W. Zhang, and K. Gopalakrishnan. AAAI, page 2827-2835. AAAI Press, (2018)

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Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks.

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Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks.