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Randomized Cache Placement for Eliminating Conflicts., and . IEEE Trans. Computers, 48 (2): 185-192 (1999)Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism., , and . IEEE Trans. Computers, 53 (2): 114-125 (2004)Implementing End-to-End Register Data-Flow Continuous Self-Test., , , , and . IEEE Trans. Computers, 60 (8): 1194-1206 (2011)Distributed Data Cache Designs for Clustered VLIW Processors., , and . IEEE Trans. Computers, 54 (10): 1227-1241 (2005)Analyzing Data Locality in Numeric Applications., and . IEEE Micro, 20 (4): 58-66 (2000)Robust stabilization of linear discrete-time systems with time-varying input delay.. Automatica, 49 (9): 2919-2922 (2013)Replacement techniques for dynamic NUCA cache designs on CMPs., , , and . The Journal of Supercomputing, 64 (2): 548-579 (2013)A Dynamically Adaptable Hardware Transactional Memory., , and . MICRO, page 27-38. IEEE Computer Society, (2010)Trace-Level Reuse., , and . ICPP, page 30-39. IEEE Computer Society, (1999)TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies., , , , , , , and . FET, volume 7 of Procedia Computer Science, page 148-149. Elsevier, (2011)