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Disambiguation of "Rubio, Antonio"

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TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies.

, , , , , , , and . FET, volume 7 of Procedia Computer Science, page 148-149. Elsevier, (2011)

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Antonio Raiolo University of Stuttgart

Giuliano Antonio Giacoppo University of Stuttgart

Rafael Antonio Lainez Reyes University of Stuttgart

Jesus Antonio Martinez Zarate University of Stuttgart

 

Other publications of authors with the same name

Selective Clock-Gating for Low-Power Synchronous Counters., , and . J. Low Power Electronics, 1 (3): 217-225 (2005)An investigation on the relation between digital circuitry characteristics and power supply noise spectrum in mixed-signal CMOS integrated circuits., , , and . Microelectronics Journal, 36 (1): 77-84 (2005)Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells., , , , and . Integration, 45 (3): 246-252 (2012)An Approach to the Development of a IDDQ Testable Cell Library., , , , and . DFT, page 46-54. IEEE Computer Society, (1994)Using Temperature as Observable of the Frequency Response of RF CMOS Amplifiers., , , , , , , , , and 1 other author(s). European Test Symposium, page 47-52. IEEE Computer Society, (2008)Electrical model of the floating gate defect in CMOS ICs: implications on IDDQ testing., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (3): 359-369 (1994)Current testability analysis of feedback bridging faults in CMOS circuits., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 14 (10): 1299-1305 (1995)A detailed analysis and electrical modeling of gate oxide shorts in MOS transistors., , , and . J. Electronic Testing, 8 (3): 229-239 (1996)New redundant logic design concept for high noise and low voltage scenarios., , , , , and . Microelectronics Journal, 42 (12): 1359-1369 (2011)Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm., , , , and . Microelectronics Journal, 45 (10): 1342-1347 (2014)