PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Garnier, Arnaud"

Author of the publication

copydeleteadd this publication to your clipboard
Silicon based dry-films evaluation for 2.5D and 3D Wafer-Level system integration improvement.

, , , , , , , , , , , , and . 3DIC, page TS1.4.1-TS1.4.8. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Garnier, Arnaud
add a person with the name Garnier, Arnaud
 

Other publications of authors with the same name

Contact-based navigation for an autonomous flying robot., , , , , , and . IROS, page 3987-3992. IEEE, (2013)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters., , , , , , , , , and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)3D advanced integration technology for heterogeneous systems., , , , , , , , , and 4 other author(s). 3DIC, page FS6.1-FS6.3. IEEE, (2015)Wafer level encapsulated materials evaluation for chip on wafer (CoW) approach in 2.5D Si interposer integration., , , , , , , , , and 2 other author(s). 3DIC, page 1-7. IEEE, (2013)Silicon based dry-films evaluation for 2.5D and 3D Wafer-Level system integration improvement., , , , , , , , , and 3 other author(s). 3DIC, page TS1.4.1-TS1.4.8. IEEE, (2015)ITAC: A complete 3D integration test platform., , , , , , , , , and 10 other author(s). 3DIC, page 1-4. IEEE, (2016)Development and evaluation of a portable MR compatible haptic interface for human motor control., , and . World Haptics, page 196-201. IEEE, (2015)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)