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Disambiguation of "Hayashi, Yoshihiro"

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Single-Chip 3072-Element-Channel Transceiver/128-Subarray-Channel 2-D Array IC With Analog RX and All-Digital TX Beamformer for Echocardiography.

, , , , , , , , , , , , , and . J. Solid-State Circuits, 54 (9): 2555-2567 (2019)

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Other publications of authors with the same name

Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs., , , , , , , , , and . J. Solid-State Circuits, 46 (4): 806-814 (2011)A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs., , and . ASP-DAC, page 51-56. IEEE, (1998)Single-Chip 3072-Element-Channel Transceiver/128-Subarray-Channel 2-D Array IC With Analog RX and All-Digital TX Beamformer for Echocardiography., , , , , , , , , and 4 other author(s). J. Solid-State Circuits, 54 (9): 2555-2567 (2019)T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and -18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver., , , , , , , , , and 1 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 30 (2): 153-165 (2022)13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model., , and . CICC, page 725-728. IEEE, (2006)A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 47 (4): 832-840 (2012)Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation., , , , , , , , , and 2 other author(s). IEICE Transactions, 90-C (4): 848-855 (2007)Visualizing Method based on Item Sales Records and its Experimentation., , and . SMC, page 524-528. IEEE, (2009)An Algorithm for Locating Logic Design Errors., , , and . ICCAD, page 468-471. IEEE Computer Society, (1990)