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Disambiguation of "Lim, Sung Kyu"

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Full chip power benefits with negative capacitance FETs.

, , , , , and . ISLPED, page 1-6. IEEE, (2017)

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Jaekeun Lim University of Stuttgart

 

Other publications of authors with the same name

Statistical Bellman-Ford algorithm with an application to retiming., , and . ASP-DAC, page 959-964. IEEE, (2006)Partitioning and placement for buildable QCA circuits., , and . ASP-DAC, page 424-427. ACM Press, (2005)TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (8): 1194-1207 (2012)Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study., , and . ISCAS, page 1266-1269. IEEE, (2015)Block-level 3D IC design with through-silicon-via planning., , and . ASP-DAC, page 335-340. IEEE, (2012)How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core., , , , , , , , , and 3 other author(s). CICC, page 1-4. IEEE, (2013)Fast delay estimation with buffer insertion for through-silicon-via-based 3D interconnects., and . ISQED, page 228-335. IEEE, (2012)Physical Planning with Retiming., and . ICCAD, page 2-7. IEEE Computer Society, (2000)Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs., , and . ICCAD, page 379-386. IEEE, (2013)Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs., , and . ICCAD, page 645-651. ACM, (2009)