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Ultra low power NEMFET based logic., , , , and . ISCAS, page 566-569. IEEE, (2013)Enabling vertical wormhole switching in 3D NoC-bus hybrid systems., , and . DATE, page 507-512. ACM, (2015)Compositional, efficient caches for a chip multi-processor., , , and . DATE, page 345-350. European Design and Automation Association, Leuven, Belgium, (2006)Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors., , , and . Trans. HiPEAC, (2007)Compositional, dynamic cache management for embedded chip multiprocessors., , and . DATE, page 991-996. ACM, (2008)A unified addition structure for moduli set 2n-1, 2n, 2n+1 based on a novel RNS representation., , and . ICCD, page 247-252. IEEE Computer Society, (2010)An improved RNS reverse converter for the 22n+1-1, 2n, 2n-1 moduli set., , , and . ISCAS, page 2103-2106. IEEE, (2010)A Novel Flit Serialization Strategy to Utilize Partially Faulty Links in Networks-on-Chip., , and . NOCS, page 124-131. IEEE Computer Society, (2012)Throughput optimization via cache partitioning for embedded multiprocessors., , , and . ICSAMOS, page 185-192. IEEE, (2006)Analog-to-digital converter based on single-electron tunneling transistors., , , and . IEEE Trans. VLSI Syst., 12 (11): 1209-1213 (2004)