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Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability.

L. Arnaud, S. Moreau, A. Jouve, I. Jani, D. Lattard, F. Fournel, C. Euvrard, Y. Exbrayat, V. Balan, N. Bresson, S. Lhostis, J. Jourdon, E. Deloffre, S. Guillaumet, A. Farcy, S. Gousseau, and M. Arnoux. IRPS, page 4. IEEE, (2018)

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IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, C. Tortolero, I. Miro-Panades, G. Moritz, J. Durupt, C. Bernard, D. Varreau and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability.L. Arnaud, S. Moreau, A. Jouve, I. Jani, D. Lattard, F. Fournel, C. Euvrard, Y. Exbrayat, V. Balan, N. Bresson and 7 other author(s). IRPS, page 4. IEEE, (2018)Interconnect design study for electromigration reliability improvement.G. Marti, L. Arnaud, D. Ney, and Y. Wouters. IRPS, page 2. IEEE, (2015)Study of EM void nucleation and mechanic relaxation effects.G. Marti, L. Arnaud, and Y. Wouters. Microelectronics Reliability, 54 (9-10): 1692-1696 (2014)ITAC: A complete 3D integration test platform.D. Lattard, L. Arnaud, A. Garnier, N. Bresson, F. Bana, R. Segaud, A. Jouve, H. Jacquinot, S. Moreau, K. Azizi-Mourier and 10 other author(s). 3DIC, page 1-4. IEEE, (2016)Reliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric.T. Frank, S. Moreau, C. Chappaz, P. Leduc, L. Arnaud, A. Thuaire, E. Chery, F. Lorut, L. Anghel, and G. Poupon. Microelectronics Reliability, 53 (1): 17-29 (2013)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro-Panades, C. Tortolero, J. Durupt, C. Bernard, D. Varreau and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)

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Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability.

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Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability.