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Design Concepts for a Dynamically ReconfigurableWireless Sensor Node.

, , and . AHS, page 436-441. IEEE Computer Society, (2006)

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An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs., , , , and . FPL, page 92-98. IEEE, (2009)Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes., , and . FPL, page 359-366. IEEE, (2009)Application-specific reconfigurable processors., , , , , , , and . FPL, page 350. IEEE, (2008)Entwurf und Energieeffizienzanalyse von dynamisch rekonfigurierbaren Architekturen für drahtlose Sensorknoten.. Darmstadt University of Technology, (2012)TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor., , , and . DIPES, volume 271 of IFIP, page 161-170. Springer, (2008)Design Concepts for a Dynamically ReconfigurableWireless Sensor Node., , and . AHS, page 436-441. IEEE Computer Society, (2006)Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme)., , , and . it - Information Technology, 49 (3): 174- (2007)An area-efficient FPGA realisation of a codebook-based image compression method., , , , and . FPT, page 349-352. IEEE, (2008)On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication., , , , and . ReCoSoC, page 185-191. Univ. Montpellier II, (2007)Towards a unique FPGA-based identification circuit using process variations., , , , , and . FPL, page 397-402. IEEE, (2009)