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Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme).

, , , and . it - Information Technology, 49 (3): 174- (2007)

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On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction., , , and . VLSI-SoC, volume 240 of IFIP, page 283-297. Springer, (2005)An adaptive system-on-chip for network applications., , , and . IPDPS, IEEE, (2006)The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures., , , and . IEEE International Workshop on Rapid System Prototyping, page 141-147. IEEE Computer Society, (2003)Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs., , , and . Microprocessors and Microsystems - Embedded Hardware Design, (2017)NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures., , , , , , and . CoRR, (2019)Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques., , , , , , , , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 12-21. Springer, (2005)Specification of Simulation Models for NoCs in Heterogeneous 3D SoCs., , , , , and . ReCoSoC, page 1-8. IEEE, (2018)Ratatoskr: An Open-Source Framework for In-Depth Power, Performance, and Area Analysis and Optimization in 3D NoCs., , , , , and . ACM Trans. Model. Comput. Simul., 32 (1): 3:1-3:21 (2022)Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme)., , , and . it - Information Technology, 49 (3): 174- (2007)A dynamically reconfigurable packet-switched network-on-chip., , and . DATE, page 136-137. European Design and Automation Association, Leuven, Belgium, (2006)