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Disambiguation of "Sheu, Bing J."

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A VLSI neuroprocessor for image restoration using analog computing-based systolic architecture.

, , and . VLSI Signal Processing, 5 (2-3): 185-199 (1993)

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J. K\"astner

J. Schwarz

J. K\"astner

J Walter

J. Vogel

 

Other publications of authors with the same name

A Neural Network Based VLSI Vector Quantizer for Real-Time Image Compression., , and . Data Compression Conference, page 342-351. IEEE Computer Society, (1991)A Gaussian Synapse Circuit for Analog VLSI Neural Networks., , and . ISCAS, page 483-486. IEEE, (1994)A Compact Neural Network Based CDMA Receiver for Multimedia Wireless Communication., , and . ICCD, page 99-103. IEEE Computer Society, (1996)An investigation on local minima of a Hopfield network for optimization circuits., and . ICNN, page 45-51. IEEE, (1988)Compact VLSI Neural Network Circuit with High-Capacity Dynamic Synapses., , , and . IJCNN (4), page 214-218. IEEE Computer Society, (2000)0-7695-0619-4.Paralleled hardware annealing for optimal solutions on electronic neural networks., and . IEEE Trans. Neural Networks, 4 (4): 588-599 (1993)An adaptive vector quantizer based on the Gold-Washing method for image compression., , and . IEEE Trans. Circuits Syst. Video Techn., 4 (2): 143-157 (1994)Image compression using self-organization networks., , and . IEEE Trans. Circuits Syst. Video Techn., 4 (5): 480-489 (1994)An MOS transistor charge model for VLSI design., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 7 (4): 520-527 (1988)BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (9): 1166-1170 (1994)