%0 Conference Paper %1 conf/ijcnn/ParkLBS00 %A Park, Yoondong %A Liaw, Jim-Shih %A Berger, Theodore W. %A Sheu, Bing J. %B IJCNN (4) %D 2000 %I IEEE Computer Society %K dblp %P 214-218 %T Compact VLSI Neural Network Circuit with High-Capacity Dynamic Synapses. %U http://dblp.uni-trier.de/db/conf/ijcnn/ijcnn2000-4.html#ParkLBS00

@inproceedings{conf/ijcnn/ParkLBS00, added-at = {2019-07-30T00:00:00.000+0200}, author = {Park, Yoondong and Liaw, Jim-Shih and Berger, Theodore W. and Sheu, Bing J.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b6b765e7b733aa2f6cb9e4cb4acd57de/dblp}, booktitle = {IJCNN (4)}, crossref = {conf/ijcnn/2000-4}, ee = {http://doi.ieeecomputersociety.org/10.1109/IJCNN.2000.860775}, interhash = {556de15ae8fc1a6196e0434642861664}, intrahash = {b6b765e7b733aa2f6cb9e4cb4acd57de}, keywords = {dblp}, note = {0-7695-0619-4}, pages = {214-218}, publisher = {IEEE Computer Society}, timestamp = {2019-09-27T17:33:33.000+0200}, title = {Compact VLSI Neural Network Circuit with High-Capacity Dynamic Synapses.}, url = {http://dblp.uni-trier.de/db/conf/ijcnn/ijcnn2000-4.html#ParkLBS00}, year = 2000 }