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A Gaussian Synapse Circuit for Analog VLSI Neural Networks.

J. Choi, B. Sheu, and J. Chang. ISCAS, page 483-486. IEEE, (1994)

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A voltage-mode DC-DC converter with enhanced transient responses.K. Jang, J. Choi, C. Park, and J. Choi. ISCAS, page 974-977. IEEE, (2012)A readout circuit with novel zero-g offset calibration for tri-axes capacitive MEMS accelerometer.J. Choi, J. Lee, S. Han, S. Kim, S. Hong, and J. Choi. ISCAS, page 1062-1065. IEEE, (2015)A wide-band active-RC filter with a fast tuning scheme for wireless communication receivers.J. Lim, Y. Cho, K. Jung, J. Park, J. Choi, and J. Kim. CICC, page 637-640. IEEE, (2005)A 3.3-V analog front-end chip for HomePNA applications.J. Shin, J. Choi, J. Lim, S. Noh, N. Baek, and J. Lee. ISCAS (4), page 698-701. IEEE, (2001)A GaAs Receiver Module for Optoelectronic Computing and Interconnection.J. Choi, and B. Sheu. ICCD, page 494-497. IEEE Computer Society, (1991)3.3-V baseband Gm-C filters for wireless transceiver applications.J. Shin, S. Min, S. Kim, J. Choi, S. Lee, H. Park, and J. Kim. ISCAS (1), page 457-460. IEEE, (2003)A low-voltage operational amplifier with high slew-rate for sigma-delta modulators.J. Choi, J. Lim, and C. Lim. ISCAS, IEEE, (2006)A piezoelectric actuator driver circuit for automatic focusing of mobile phone cameras.S. Yu, K. Jang, S. Cha, Y. Lee, O. Kwon, K. Kwon, and J. Choi. ISCAS, page 2106-2109. IEEE, (2008)A Gaussian Synapse Circuit for Analog VLSI Neural Networks.J. Choi, B. Sheu, and J. Chang. ISCAS, page 483-486. IEEE, (1994)Effect of H/Ar treatment on ZnO: B transparent conducting oxide for flexible a-Si: H/μc-Si: H photovoltaic modules under damp heat stress.J. Jeong, Y. Kim, C. kyun Park, H. Kim, and J. Choi. Microelectronics Reliability, (2016)

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Disambiguation of "Choi, Joongho"

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A Gaussian Synapse Circuit for Analog VLSI Neural Networks.

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Disambiguation of "Choi, Joongho"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Gaussian Synapse Circuit for Analog VLSI Neural Networks.

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A Gaussian Synapse Circuit for Analog VLSI Neural Networks.