Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Chakrabarti, Chaitali
add a person with the name Chakrabarti, Chaitali
 

Other publications of authors with the same name

Voltage Scaling for Energy Minimization with QoS Constraints., and . ICCD, page 438-446. IEEE Computer Society, (2001)A survey of architectures for the discrete and continuous wavelet transforms., , and . ICASSP, page 2849-2852. IEEE Computer Society, (1995)A distributed psycho-visually motivated Canny edge detector., , , and . ICASSP, page 822-825. IEEE, (2010)An approach for adaptively approximating the Viterbi algorithm to reduce power consumption while decoding convolutional codes., and . IEEE Trans. Signal Processing, 52 (5): 1443-1451 (2004)A VLSI architecture for lifting-based forward and inverse wavelet transform., , and . IEEE Trans. Signal Processing, 50 (4): 966-977 (2002)Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations., , , , , , , , , and . SoCC, page 113-114. IEEE, (2006)Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound., , , , and . HPCA, page 318-329. IEEE Computer Society, (2013)An Efficient Control Point Insertion Technique for Leakage Reduction of Scaled CMOS Circuits., and . IEEE Trans. on Circuits and Systems, 52-II (8): 496-500 (2005)Multidimensional DFT IP Generator for FPGA Platforms., , , and . IEEE Trans. on Circuits and Systems, 58-I (4): 755-764 (2011)An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization., , , , , , , , , and . IEEE Trans. Computers, 58 (12): 1654-1667 (2009)