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System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search., , , and . Design Autom. for Emb. Sys., 2 (1): 5-32 (1997)Modeling and formal verification of embedded systems based on a Petri net representation., , and . Journal of Systems Architecture, 49 (12-15): 571-598 (2003)Scheduling under data and control dependencies for heterogeneous architectures., and . ICCD, page 602-608. (1998)Process-Variation Aware Multi-temperature Test Scheduling., , and . VLSI Design, page 32-37. IEEE Computer Society, (2014)Process-Variation and Temperature Aware SoC Test Scheduling Technique., , and . J. Electronic Testing, 29 (4): 499-520 (2013)Low-Energy Standby-Sparing for Hard Real-Time Systems., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (3): 329-342 (2012)Scheduling for Fault-Tolerant Communication on the Static Segment of FlexRay., , , and . RTSS, page 385-394. IEEE Computer Society, (2010)Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction., , , and . DSD, page 34-41. IEEE Computer Society, (2005)Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation., , , and . Asian Test Symposium, page 395-398. IEEE Computer Society, (2010)Hybrid BIST Test Scheduling Based on Defect Probabilities., , , and . Asian Test Symposium, page 230-235. IEEE Computer Society, (2004)