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Process-Variation and Temperature Aware SoC Test Scheduling Technique.

, , and . J. Electronic Testing, 29 (4): 499-520 (2013)

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Process-Variation and Temperature Aware SoC Test Scheduling Technique., , and . J. Electronic Testing, 29 (4): 499-520 (2013)An Integrated Framework for the Design and Optimization of SOC Test Solutions., and . J. Electronic Testing, 18 (4-5): 385-400 (2002)Time-Constraint-Aware Optimization of Assertions in Embedded Software., , , , , , and . J. Electronic Testing, 28 (4): 469-486 (2012)On-line Temperature-Aware Idle Time Distribution for Leakage Energy Optimization., , , and . DELTA, page 156-161. IEEE Computer Society, (2011)Predictable Worst-Case Execution Time Analysis for Multiprocessor Systems-on-Chip., , , and . DELTA, page 99-104. IEEE Computer Society, (2011)A Heuristic for Wiring-Aware Built-In Self-Test Synthesis., , and . DSD, page 408-415. IEEE Computer Society, (2004)Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints., , , , and . DATE, page 514-519. IEEE Computer Society, (2005)Counting dynamically synchronizing processes., , , and . STTT, 18 (5): 517-534 (2016)Probabilistic Response Time and Joint Analysis of Periodic Tasks., , , and . ECRTS, page 235-246. IEEE Computer Society, (2015)Mapping of Fault-Tolerant Applications with Transparency on Distributed Embedded Systems*., , , and . DSD, page 313-322. IEEE Computer Society, (2006)