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System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search.

, , , and . Design Autom. for Emb. Sys., 2 (1): 5-32 (1997)

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LEneS: task scheduling for low-energy systems using variable supply voltage processors., and . ASP-DAC, page 449-455. ACM, (2001)Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming., and . Journal of Systems Architecture, 49 (12-15): 489-503 (2003)Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints.. DATE, page 772-773. IEEE Computer Society / ACM, (1999)Compiling VHDL into a high-level synthesis design representation., , , and . EURO-DAC, page 604-609. IEEE Computer Society Press, (1992)Code generation for a SIMD architecture with custom memory organisation., , , and . DASIP, page 90-97. IEEE, (2016)Partial task assignment of task graphs under heterogeneous resource constraints., and . DAC, page 244-249. ACM, (2003)Evaluation of SIMD Architecture Enhancement in Embedded Processors for MPEG-4., and . DSD, page 262-269. IEEE Computer Society, (2004)Java to Hardware Compilation for non Data Flow Applications., and . DSD, page 330-337. IEEE Computer Society, (2005)Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures., , , and . FCCM, page 306-309. IEEE Computer Society, (2008)Automatic Parallelization of a Petri Net-Based Design Representation for High-Level Synthesis., , , and . EUROMICRO, page 185-192. IEEE Computer Society, (1996)