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A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS., , , , , , , , and . A-SSCC, page 1-4. IEEE, (2015)An Incremental-Charge-Based Digital Transmitter With Built-in Filtering., , , and . J. Solid-State Circuits, 50 (12): 3065-3076 (2015)A 150 kHz-80 MHz BW Discrete-Time Analog Baseband for Software-Defined-Radio Receivers using a 5th-Order IIR LPF, Active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS., , , , and . J. Solid-State Circuits, 51 (7): 1593-1606 (2016)A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS., , , , and . J. Solid-State Circuits, 45 (10): 2080-2090 (2010)A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS., , , , and . J. Solid-State Circuits, 44 (3): 874-882 (2009)A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOS., , , and . ESSCIRC, page 348-351. IEEE, (2015)FinFET technology for analog and RF circuits., , , , , , , and . ICECS, page 182-185. IEEE, (2007)F6: Mixed-signal/RF design and modeling in next-generation CMOS., , , and . ISSCC, page 510-511. IEEE, (2013)ESD-RF co-design methodology for the state of the art RF-CMOS blocks., , , , , , , , and . Microelectronics Reliability, 45 (2): 255-268 (2005)High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions., , , and . DATE, page 586-590. IEEE Computer Society, (2002)