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A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.

B. Verbruggen, J. Craninckx, M. Kuijk, P. Wambacq, and G. der Plas. J. Solid-State Circuits, 44 (3): 874-882 (2009)

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Jann Van der Meer University of Stuttgart

Univ. -Prof. Dr. Joris van Slageren University of Stuttgart

Electrocatalytic proton reduction: Metal based fused diporphyrins with proton relays for efficient catalysisA. Singha Hazari, S. Chandra, Q. Song, D. Hunger, N. Neuman, J. Slageren, E. Klemm, B. Sarkar, and S. Kar. Dataset, (2024)Related to: Chandra, S., Singha Hazari, A., Song, Q., Hunger, D., Neuman, N. I., van Slageren, J., Klemm, E. & Sarkar, B. (2023). Remarkable Enhancement of Catalytic Activity of Cu-Complexes in the Electrochemical Hydrogen Evolution Reaction by Using Triply Fused Porphyrin. ChemSusChem 16, e202201146. doi: 10.1002/cssc.202201146.

Dr. Geert Schellenberg University of Stuttgart

Denis Dertli University of Stuttgart

Nina van den Daele University of Stuttgart

Other publications of authors with the same name

AMGIE-A synthesis environment for CMOS analog integrated circuits.G. der Plas, G. Debyser, F. Leyn, K. Lampaert, J. Vandenbussche, G. Gielen, W. Sansen, P. Veselinovic, and D. Leenaerts. IEEE Trans. on CAD of Integrated Circuits and Systems, 20 (9): 1037-1058 (2001)3D integration: Circuit design, test, and reliability challenges.N. Minas, I. Wolf, E. Marinissen, M. Stucchi, H. Oprins, A. Mercha, G. der Plas, D. Velenis, and P. Marchal. IOLTS, page 217. IEEE Computer Society, (2010)A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS.B. Verbruggen, J. Craninckx, M. Kuijk, P. Wambacq, and G. der Plas. J. Solid-State Circuits, 45 (10): 2080-2090 (2010)A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.B. Verbruggen, J. Craninckx, M. Kuijk, P. Wambacq, and G. der Plas. J. Solid-State Circuits, 44 (3): 874-882 (2009)A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS.J. Ryckaert, J. Borremans, B. Verbruggen, L. Bos, C. Armiento, J. Craninckx, and G. der Plas. J. Solid-State Circuits, 44 (11): 2873-2880 (2009)SWAN: high-level simulation methodology for digital substrate noise generation.M. Badaroglu, G. der Plas, P. Wambacq, S. Donnay, G. Gielen, and H. Man. IEEE Trans. VLSI Syst., 14 (1): 23-33 (2006)Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters.S. Saponara, P. Nuzzo, C. Nani, G. der Plas, and L. Fanucci. IEICE Transactions, 92-C (6): 843-851 (2009)An 820μW 9b 40MS/s Noise-Tolerant Dynamic-SAR ADC in 90nm Digital CMOS.V. Giannini, P. Nuzzo, V. Chironi, A. Baschirotto, G. der Plas, and J. Craninckx. ISSCC, page 238-239. IEEE, (2008)Comparative study of 3D stacked IC and 3D interposer integration: Processing and assembly challenges.J. Vos, V. Cherman, M. Detalle, T. Wang, A. Salahouelhadj, R. Daily, G. der Plas, and E. Beyne. 3DIC, page 1-7. IEEE, (2014)Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study.D. Milojevic, T. Carlson, K. Croes, R. Radojcic, D. Ragett, D. Seynhaeve, F. Angiolini, G. der Plas, and P. Marchal. 3DIC, page 1-6. IEEE, (2009)

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Disambiguation of "der Plas, Geert Van"

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A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.

Please choose a person to relate this publication to

Jann Van der Meer University of Stuttgart

Univ. -Prof. Dr. Joris van Slageren University of Stuttgart

Dr. Geert Schellenberg University of Stuttgart

Denis Dertli University of Stuttgart

Nina van den Daele University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "der Plas, Geert Van"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.

Please choose a person to relate this publication to

Jann Van der Meer University of Stuttgart

Univ. -Prof. Dr. Joris van Slageren University of Stuttgart

Dr. Geert Schellenberg University of Stuttgart

Denis Dertli University of Stuttgart

Nina van den Daele University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
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A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.