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Introduction to the Special Issue on the 2007 IEEE International Solid-State Circuits Conference.

, , , and . J. Solid-State Circuits, 43 (1): 3-5 (2008)

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Sequential Element Timing Parameter Definition Considering Clock Uncertainty.. IEEE Trans. VLSI Syst., 23 (11): 2705-2708 (2015)Comparison of parallelized radix-2 and radix-4 scalable Montgomery multipliers., , , , , , , , , and . ACSSC, page 1144-1148. IEEE, (2013)A 2.4GHz 256/1024-bit Encryption Accelerator reconfigurable Montgomery multiplier in 90nm CMOS., , , , and . SoCC, page 25-28. IEEE, (2007)Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction., , , , , , and . J. Solid-State Circuits, 48 (1): 66-81 (2013)Introductory digital design & computer architecture curriculum., and . MSE, page 14-16. IEEE Computer Society, (2013)Bubble Razor: An architecture-independent approach to timing-error detection and correction., , , , , , and . ISSCC, page 488-490. IEEE, (2012)An Improved Unified Scalable Radix-2 Montgomery Multiplier., , , , and . IEEE Symposium on Computer Arithmetic, page 172-178. IEEE Computer Society, (2005)SE6 Secure Digital Systems., and . ISSCC, page 372-373. IEEE, (2007)Parallelized radix-4 scalable montgomery multipliers., and . SBCCI, page 306-311. ACM, (2007)A Compact Transregional Model for Digital CMOS Circuits Operating Near Threshold., , and . IEEE Trans. VLSI Syst., 22 (10): 2041-2053 (2014)