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Disambiguation of "Zatt, Bruno"

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Energy-Aware Motion and Disparity Estimation System for 3D-HEVC With Run-Time Adaptive Memory Hierarchy.

, , , , , , , , , and . IEEE Trans. Circuits Syst. Video Techn., 29 (6): 1878-1892 (2019)

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Univ. -Prof. Piero Bruno University of Stuttgart

Dr. Bruno Gompf University of Stuttgart

Bruno Ohngemach University of Stuttgart

apl. Prof. Dr. -Ing. Bruno Braun University of Stuttgart

 

Other publications of authors with the same name

Sample adaptive offset filter hardware design for HEVC encoder., , , , and . VCIP, page 299-302. IEEE, (2014)Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder., , , , and . ISVLSI, page 445-446. IEEE Computer Society, (2007)A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding., , , , and . ICECS, page 587-590. IEEE, (2010)A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding., , , and . ICCAD, page 40-47. IEEE Computer Society, (2011)Quality and Energy-Aware HEVC Transrating Based on Machine Learning., , , , , and . IEEE Trans. on Circuits and Systems, 66-I (6): 2124-2136 (2019)Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing., , , , and . SBCCI, page 30-35. ACM, (2017)Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture., , , and . SBCCI, page 47-52. ACM, (2017)A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264/AVC Video Encoder., , , and . SBCCI, page 10:1-10:6. ACM, (2015)Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos., , , , and . SBCCI, page 12:1-12:6. ACM, (2015)ASIC power-estimation accuracy evaluation: A case study using video-coding architectures., , , , , , and . LASCAS, page 1-4. IEEE, (2018)