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Disambiguation of "Sakurai, Takayasu"

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0.4V SRAM with bit line swing suppression charge share hierarchical bit line scheme.

, , , , and . CICC, page 1-4. IEEE, (2011)

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Other publications of authors with the same name

Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS)., , , , and . ISCAS (4), page 3119-3122. IEEE, (2005)A 100Mbps, 0.19mW asynchronous threshold detector with DC power-free pulse discrimination for impulse UWB receiver., , , , , , , and . ASP-DAC, page 97-98. IEEE, (2009)VTCMOS characteristics and its optimum conditions predicted by a compact analytical model., , , , and . IEEE Trans. VLSI Syst., 11 (5): 755-761 (2003)A 315 MHz Power-Gated Ultra Low Power Transceiver in 40 nm CMOS for Wireless Sensor Network., , and . IEICE Transactions, 95-C (6): 1035-1041 (2012)0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS., , , , , , , and . IEICE Transactions, 94-C (6): 938-944 (2011)CMOS inverter delay and other formulas using alpha -power law MOS model.. ICCAD, page 74-77. IEEE Computer Society, (1988)Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage (poster session)., , and . ISLPED, page 228-230. ACM, (2000)Large-area and flexible sensors with organic transistors., , , , , and . IWASI, page 87-90. IEEE, (2013)Trends of On-Chip Interconnects in Deep Sub-Micron VLSI., , , and . IEICE Transactions, 89-C (3): 392-394 (2006)A 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester., , , , , , and . ASP-DAC, page 469-470. IEEE, (2012)