Author of the publication

Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS).

, , , , and . ISCAS (4), page 3119-3122. IEEE, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Kanda, Kouichi
add a person with the name Kanda, Kouichi
 

Other publications of authors with the same name

A 0.33 nJ/bit IEEE802.15.6/Proprietary MICS/ISM Wireless Transceiver With Scalable Data Rate for Medical Implantable Applications., , , , , , , , , and 6 other author(s). IEEE J. Biomedical and Health Informatics, 19 (3): 920-929 (2015)A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets., , , , , , , , , and 10 other author(s). ISSCC, page 86-88. IEEE, (2012)Radio channel characterization for 400 MHz implanted devices., , , , , , , and . WCNC, page 293-298. IEEE, (2014)A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS., , , , , , , , , and 8 other author(s). J. Solid-State Circuits, 44 (12): 3580-3589 (2009)MAQO: A Scalable Many-Core Annealer for Quadratic Optimization on a Stratix 10 FPGA., , , , , and . FPGA, page 155. ACM, (2022)Circuits for CMOS High-Speed I/O in Sub-100 nm Technologies., , , , , , and . IEICE Transactions, 89-C (3): 300-313 (2006)A 60-GHz 1.65mW 25.9% locking range multi-order LC oscillator based injection locked frequency divider in 65nm CMOS., , , , , , and . CICC, page 1-4. IEEE, (2010)A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range., , , , , , and . IEICE Transactions, 94-C (6): 1049-1052 (2011)20-GHz Quadrature Injection-Locked LC Dividers With Enhanced Locking Range., , , , , and . J. Solid-State Circuits, 43 (3): 610-618 (2008)Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's., , , , , , , , , and . IEICE Transactions, 88-C (4): 760-767 (2005)